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Korean chipmakers

Samsung to build $281 million chip packaging R&D center in Yokohama

Half of the investment will be subsidized by Japan as Tokyo looks to revitalize domestic chip manufacturing

By Dec 22, 2023 (Gmt+09:00)

3 Min read

A researcher at a Samsung Electronics chip cleanroom
A researcher at a Samsung Electronics chip cleanroom

South Korea’s Samsung Electronics Co., the world’s largest memory chipmaker, will build a 40 billion yen ($281 million) advanced chip packaging research and development center in Japan amid improving ties between the neighboring countries.

Samsung will set up the research facility in Yokohama, southwest of Tokyo, to develop new chip packaging technology and deepen ties with Japanese makers of chipmaking equipment and materials, according to an announcement by the city of Yokohama and media reports.

Separately, Japan's industry ministry said it would offer Samsung subsidies worth up to 20 billion yen to support the revitalization of domestic chip manufacturing.

At the facility, Samsung will research back-end process technology in partnership with Japanese companies for artificial intelligence and 5G chips. Samsung expects the R&D center to strengthen its “leadership in chips.”

South Korean President Yoon Suk Yeol (left) shakes hands with Japanese Prime Minister Fumio Kishida in Tokyo, March 2023 (Courtesy of Yonhap)
South Korean President Yoon Suk Yeol (left) shakes hands with Japanese Prime Minister Fumio Kishida in Tokyo, March 2023 (Courtesy of Yonhap)

Samsung’s investment comes at a time of easing tensions between Seoul and Tokyo as the US encourages its two Asian allies to work together to counter China’s growing technological prowess.

At a summit meeting in Seoul on May 7, Korean President Yoon Suk Yeol and Japanese Prime Minister Fumio Kishida agreed to enhance the two countries’ chip alliance to improve the semiconductor supply chain.

TSMC, OTHER GLOBAL CHIPMAKERS RUSH TO TOKYO

Analysts said the Japanese government’s decision to pay for up to half of Samsung’s Yokohama R&D center symbolizes Tokyo’s determination to revive the island country’s once-mighty chip industry from decades of underinvestment and stagnant growth.

Amid heightened geopolitical tensions in Asia and technological rivalry between the US and China, Japan has been striving to bolster its chip supply chain by luring investment from firms abroad.

Samsung Electronics Chairman Jay Y. Lee (third from left) visits a Samsung chip packaging line in Korea on Feb. 17, 2023
Samsung Electronics Chairman Jay Y. Lee (third from left) visits a Samsung chip packaging line in Korea on Feb. 17, 2023


Global chip foundry leader Taiwan Semiconductor Manufacturing Co. (TSMC) is currently building its first Japanese chip plant in the western prefecture of Kumamoto as a joint venture with Sony. The facility 1 of the plant is scheduled for completion in February.

Semiconductor investments by foreign firms currently aided by the Japanese government include those by Micron Technology Inc. in Hiroshima Prefecture and Western Digital Corp. in Mie Prefecture.

PACKAGING: NEXT BATTLE GROUND FOR CHIPMAKERS

Yokohama is home to another Samsung R&D institute.

In May, Samsung said it restructured its two R&D facilities – one in Yokohama and the other in Osaka – to launch an enlarged semiconductor research and development center in Japan, DSRJ.

Samsung is the world's largest maker of smartphones and memory chips
Samsung is the world's largest maker of smartphones and memory chips

Samsung, a distant runner-up in foundry or contract chipmaking after TSMC, has been strengthening its research capabilities as demand for semiconductors grows across various industries, including AI, autonomous vehicles and 5G communications.

Last month, the Korean tech giant said it plans to unveil an advanced three-dimensional (3D) chip packaging technology next year to better compete with its archrival TSMC.

The technology, dubbed SAINT, or Samsung Advanced Interconnection Technology, will integrate memory and processors required of high-performance chips, including AI chips, in much smaller sizes.

Packaging, one of the final steps in semiconductor manufacturing, places chips in a protective case to prevent corrosion and provides an interface to combine and connect already made chips.

Packaging technology can enhance semiconductor performance without having to shrink the nanometer through ultra-fine processing, which is technologically challenging and requires more time.

According to consulting firm Yole Intelligence, the global advanced chip packaging market is forecast to grow from $44.3 billion in 2022 to $66 billion by 2027. Of that $66 billion, 3D packaging is expected to account for about a quarter, or $15 billion.

Write to Jeong-Soo Hwang at hjs@hankyung.com

In-Soo Nam edited this article.
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